Improved thin-film transistor (TFT) characteristics on chemical-mechanically polished polycrystalline silicon film

Abstract

A standard CMP (chemical mechanical polishing) process has been used to reduce surface roughness of a polysilicon thin film. An N-channel TFT has been fabricated on both polished and unpolished polysilicon thin films. Both thin thermally grown and deposited oxides with thickness under 30 nm are used as the gate dielectric. It is founded that a TFT fabricated on polished polysilicon thin film exhibits higher carrier mobility, better sub-threshold swing, lower threshold voltage, higher on/off current ratio as well as better ability to withstand high voltage operation and longer device lifetime. Such improvement should benefit applications which incorporate TFT such as SRAM and LCD display.