CMOS design of cellular APAPs and FPAPAPs: an overview

A. Rdriguez-Vazquez
{"title":"CMOS design of cellular APAPs and FPAPAPs: an overview","authors":"A. Rdriguez-Vazquez","doi":"10.1109/CNNA.2002.1035088","DOIUrl":null,"url":null,"abstract":"CNN-based analog visual microprocessors have similarities with the so-called Single Instruction Multiple Data systems, although they work directly on analog signal representations obtained through embedded optical sensors and hence do not need a frontend sensory plane or analog-to-digital converters. The architecture of these visual microprocessors is illustrated in the paper through two prototype chips, namely: ACE4K and ACE16K. In both cases, as in other related chips the architecture includes a core array of interconnected elementary processing units, surrounded by a global circuitry.","PeriodicalId":387716,"journal":{"name":"Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications","volume":"63 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CNNA.2002.1035088","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

CNN-based analog visual microprocessors have similarities with the so-called Single Instruction Multiple Data systems, although they work directly on analog signal representations obtained through embedded optical sensors and hence do not need a frontend sensory plane or analog-to-digital converters. The architecture of these visual microprocessors is illustrated in the paper through two prototype chips, namely: ACE4K and ACE16K. In both cases, as in other related chips the architecture includes a core array of interconnected elementary processing units, surrounded by a global circuitry.
蜂窝apap和fpapap的CMOS设计:概述
基于cnn的模拟视觉微处理器与所谓的单指令多数据系统有相似之处,尽管它们直接处理通过嵌入式光学传感器获得的模拟信号表示,因此不需要前端感觉平面或模数转换器。本文通过两个原型芯片ACE4K和ACE16K来说明这些视觉微处理器的结构。在这两种情况下,就像在其他相关芯片中一样,架构包括一个由相互连接的基本处理单元组成的核心阵列,周围是一个全局电路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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