J. Sebastián, J. Uceda, M. Pérez, M. Rico, F. Aldana
{"title":"A very simple method to obtain one additional fully regulated output in zero-current-switched quasiresonant converters","authors":"J. Sebastián, J. Uceda, M. Pérez, M. Rico, F. Aldana","doi":"10.1109/PESC.1990.131234","DOIUrl":null,"url":null,"abstract":"A novel solution to the problem of obtaining an additional fully regulated output in zero current-switched quasi-resonant power converters (ZCS-QRCs) is presented. The solution consists of connecting low-power PWM (pulse width modulation) topology to the resonant switch and modulating the duty cycle (in addition to the switching frequency) in the power transistor. The PWM topology must have a transformer or a tapped-inductor to overcome a constraint between the output voltage gain in both outputs. The converter obtained has a nonzero-current-switching, but the increase in switching losses is very small if the power handled by the new output is much smaller than the one delivered by the main output.<<ETX>>","PeriodicalId":330807,"journal":{"name":"21st Annual IEEE Conference on Power Electronics Specialists","volume":"18 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"21st Annual IEEE Conference on Power Electronics Specialists","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PESC.1990.131234","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
A novel solution to the problem of obtaining an additional fully regulated output in zero current-switched quasi-resonant power converters (ZCS-QRCs) is presented. The solution consists of connecting low-power PWM (pulse width modulation) topology to the resonant switch and modulating the duty cycle (in addition to the switching frequency) in the power transistor. The PWM topology must have a transformer or a tapped-inductor to overcome a constraint between the output voltage gain in both outputs. The converter obtained has a nonzero-current-switching, but the increase in switching losses is very small if the power handled by the new output is much smaller than the one delivered by the main output.<>