A heuristic mapping approach for wormhole switching based Network-on-Chip

Abstract

Network-on-Chip mapping and the configuration of the communication parameters are critical process of the NoC design. They significantly influence the performance, area and power of the NoCs. We take the NoC mapping problem and the design of the communication parameters both into account. First, we formalize the problem of NoC mapping. Then we propose an analytical delay model based on wormhole switching. We heuristic map the application model to NoC topology under the constraints of communication delay and obtain the communication parameters automatically. Experiments show that our approach is more comprehensive than previous work and the time consumed by our approach is up to 30% of the reference work.