Implementation of 4-bit carry select adder using Diode free adiabatic logic (DFAL)

Abstract

Adiabatic Logic is the most effective technique which is used for implementing of low power digital logic circuits. In this research paper to designed low power Dissipation carry select adder using DFAL 2X1 mux and Diode free adiabatic logic (DFAL) which compare proposed adder circuit with CMOS Technology Designed Adder for low power VLSI Application. In digital electronics, adder is a play important role that performs addition of binary numbers. Now a days The Propagation Delay of Each adder is major problem overcomes by using Carry select Adder. Its area is slightly increasing as compared with normal adder. In this research paper we have used T_SPICE simulator at 0.18μm technology with Mosis Modal and 1.8V standard CMOS for simulation. We have observed that Diode free adiabatic technique saves 55% more power in comparison of CMOS logic with the transition frequency range of 10-80MHZ.