A. Shahbahrami, M. Ahmadi, Stephan Wong, K. Bertels
{"title":"A New Approach to Implement Discrete Wavelet Transform Using Collaboration of Reconfigurable Elements","authors":"A. Shahbahrami, M. Ahmadi, Stephan Wong, K. Bertels","doi":"10.1109/ReConFig.2009.59","DOIUrl":null,"url":null,"abstract":"The Discrete Wavelet Transform (DWT) is an important operation in applications of digital signal processing. In this paper, we review several traditional DWT implementation approaches, e.g., application-specific integrated circuits, field-programmable gate arrays, digital signal processors, general-purpose processors, and graphic processors, and discuss their limitations in terms of performance and flexibility. In order to provide both high-performance and flexibility, we propose a new approach, namely a parallel architecture exploiting the collaboration of reconfigurable processing elements in grid computing. Grid computing can exploit the task level parallelism to execute the 2D DWT. In addition, reconfigurable computing offers a flexible platform and can be used as hardware accelerators. We mapped the DWT in a grid. Our experimental results show that speedups of up to 4.1x can be achieved.","PeriodicalId":325631,"journal":{"name":"2009 International Conference on Reconfigurable Computing and FPGAs","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Conference on Reconfigurable Computing and FPGAs","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ReConFig.2009.59","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
The Discrete Wavelet Transform (DWT) is an important operation in applications of digital signal processing. In this paper, we review several traditional DWT implementation approaches, e.g., application-specific integrated circuits, field-programmable gate arrays, digital signal processors, general-purpose processors, and graphic processors, and discuss their limitations in terms of performance and flexibility. In order to provide both high-performance and flexibility, we propose a new approach, namely a parallel architecture exploiting the collaboration of reconfigurable processing elements in grid computing. Grid computing can exploit the task level parallelism to execute the 2D DWT. In addition, reconfigurable computing offers a flexible platform and can be used as hardware accelerators. We mapped the DWT in a grid. Our experimental results show that speedups of up to 4.1x can be achieved.