Compact low-voltage CMOS analog divider using a four-quadrant multiplier and biasing control circuit

Abstract

A compact low-voltage analog divider is presented. The design is based on a four-quadrant multiplier and a differential transconductance amplifier as basic building blocks operating in voltage mode. A biasing control circuit to set the dc operational point that requires very few devices and offers continuous-time operation is included. Experimental results of a test chip in 0.5μm CMOS technology verify the proposed operation.