{"title":"Estimation of reject ratio in testing of combinatorial circuits","authors":"D. Gaitonde, J. Khare, D. Walker, Wojciech Maly","doi":"10.1109/VTEST.1993.313370","DOIUrl":null,"url":null,"abstract":"Estimating the reject ratio for integrated circuits is an important problem to a test engineer. Using information about the decrease in reject ratio with increasing test length, the test engineer can estimate the test length necessary to achieve a desired product quality goal. This paper suggests a method for estimation of reject ratio for random testing of combinatorial circuits that takes into account differing individual fault probabilities. The authors also suggest some ways of estimating the fault probabilities. They then demonstrate the method on an example and compare results to previous work.<<ETX>>","PeriodicalId":283218,"journal":{"name":"Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium","volume":"40 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTEST.1993.313370","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
Estimating the reject ratio for integrated circuits is an important problem to a test engineer. Using information about the decrease in reject ratio with increasing test length, the test engineer can estimate the test length necessary to achieve a desired product quality goal. This paper suggests a method for estimation of reject ratio for random testing of combinatorial circuits that takes into account differing individual fault probabilities. The authors also suggest some ways of estimating the fault probabilities. They then demonstrate the method on an example and compare results to previous work.<>