Q. Lu, H. Takeuchi, Xiaofan Meng, T. King, C. Hu, K. Onishi, Hag-ju Cho, J. Lee
{"title":"Improved performance of ultra-thin HfO/sub 2/ CMOSFETs using poly-SiGe gate","authors":"Q. Lu, H. Takeuchi, Xiaofan Meng, T. King, C. Hu, K. Onishi, Hag-ju Cho, J. Lee","doi":"10.1109/VLSIT.2002.1015400","DOIUrl":null,"url":null,"abstract":"Poly-SiGe is investigated as the gate material for CMOS transistors with ultra-thin HfO/sub 2/ gate dielectric. Compared with poly-Si, poly-SiGe reduces the gate depletion effect, and also results in thinner EOT of the gate dielectric after 1000/spl deg/C annealing, with low gate leakage maintained. The Si interface quality is also better than that achieved with surface nitridation, which has been used to reduce EOT. Therefore, the use of poly-SiGe as the gate material is effective for improving the performance of ultra-thin HfO/sub 2/ CMOS transistors.","PeriodicalId":103040,"journal":{"name":"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2002.1015400","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
Poly-SiGe is investigated as the gate material for CMOS transistors with ultra-thin HfO/sub 2/ gate dielectric. Compared with poly-Si, poly-SiGe reduces the gate depletion effect, and also results in thinner EOT of the gate dielectric after 1000/spl deg/C annealing, with low gate leakage maintained. The Si interface quality is also better than that achieved with surface nitridation, which has been used to reduce EOT. Therefore, the use of poly-SiGe as the gate material is effective for improving the performance of ultra-thin HfO/sub 2/ CMOS transistors.