A 14-GHz-Band Harmonic Tuned Low-Power Low-Phase-Noise VCO IC with a Novel Bias Feedback Circuit in 40-nm CMOS SOI

Mengchu Fang, T. Yoshimasu
{"title":"A 14-GHz-Band Harmonic Tuned Low-Power Low-Phase-Noise VCO IC with a Novel Bias Feedback Circuit in 40-nm CMOS SOI","authors":"Mengchu Fang, T. Yoshimasu","doi":"10.1109/RFIC54546.2022.9863193","DOIUrl":null,"url":null,"abstract":"In this paper, a harmonic tuned low-power low-phase-noise VCO IC with a novel bias feedback circuit is proposed. The transformer-based LC tank providing high impedance at the second and third harmonics is used to improve the phase noise performance. In addition, a novel feedback circuit is designed to suppress the gate-to-source voltage of the core transistors under their threshold voltage at the steady state while guaranteeing the robust start-up of the oscillation. The novel feedback circuit that requires no dc power supply can operate with an extremely small additional dc power consumption. The proposed VCO IC is designed, fabricated, and fully evaluated on-wafer in 40-nm CMOS SOI process. The proposed VCO IC has exhibited a measured best phase noise of -131.8 dBc/Hz at 10-MHz offset from the oscillation frequency of 14.94 GHz under a dc power consumption of only 1.4 mW.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863193","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

In this paper, a harmonic tuned low-power low-phase-noise VCO IC with a novel bias feedback circuit is proposed. The transformer-based LC tank providing high impedance at the second and third harmonics is used to improve the phase noise performance. In addition, a novel feedback circuit is designed to suppress the gate-to-source voltage of the core transistors under their threshold voltage at the steady state while guaranteeing the robust start-up of the oscillation. The novel feedback circuit that requires no dc power supply can operate with an extremely small additional dc power consumption. The proposed VCO IC is designed, fabricated, and fully evaluated on-wafer in 40-nm CMOS SOI process. The proposed VCO IC has exhibited a measured best phase noise of -131.8 dBc/Hz at 10-MHz offset from the oscillation frequency of 14.94 GHz under a dc power consumption of only 1.4 mW.
采用新型偏置反馈电路的14ghz频段谐波调谐低功耗低相位噪声压控集成电路
本文提出了一种谐波调谐低功率低相位噪声压控集成电路,并采用了一种新型的偏置反馈电路。基于变压器的LC槽在二次和三次谐波处提供高阻抗,以改善相位噪声性能。此外,设计了一种新的反馈电路,在保证振荡鲁棒启动的同时,将核心晶体管的栅源电压抑制在稳态阈值电压以下。这种新型反馈电路不需要直流电源,可以以极小的额外直流功耗运行。提出的VCO IC是在40纳米CMOS SOI工艺中设计、制造和全面评估的。在直流功耗仅为1.4 mW的情况下,所提出的VCO IC在振荡频率为14.94 GHz的10 mhz偏移处显示出-131.8 dBc/Hz的最佳相位噪声。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信