{"title":"An 18.5nW, 62.9dB PSRR, Switched-Capacitor Bandgap Voltage Reference using Low Power Clock Generator Circuit for Biomedical Applications","authors":"Samriddhi Agarwal, Shameer Basha Yerragudi, Naveen Dasari, Inhee Lee, Zia Abbas","doi":"10.1109/ISCAS46773.2023.10181473","DOIUrl":null,"url":null,"abstract":"This paper proposes a switched-capacitor network (SCN) based fractional bandgap voltage reference (BGR) circuit designed in 180nm CMOS process to achieve high accuracy and low power consumption for implantable biomedical applications. The design proposes a $V_{EB}$ generator that employs a 2x charge pump and an improved SCN to generate a temperature inde-pendent reference voltage $(V_{REF})$’. A low-power clock generator circuit is proposed, which reduces the leakage current by 37 % compared to previous works, thereby reducing the circuit's power consumption to 18.5nW at typical conditions. The design works from a supply voltage of 0.5V and has a TC of 74. Sppm/ ${}^{\\circ} \\mathrm{C}$ over a temperature range of $0-80^{\\circ} \\mathrm{C}$. The PSRR of the circuit is -62.9dB at 100Hz. Based on the Monte Carlo simulations of 500 samples, we obtain an untrimmed $3\\sigma/\\mu$ of 2.6%. The design occupies an active area of 0.027mm2.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS46773.2023.10181473","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper proposes a switched-capacitor network (SCN) based fractional bandgap voltage reference (BGR) circuit designed in 180nm CMOS process to achieve high accuracy and low power consumption for implantable biomedical applications. The design proposes a $V_{EB}$ generator that employs a 2x charge pump and an improved SCN to generate a temperature inde-pendent reference voltage $(V_{REF})$’. A low-power clock generator circuit is proposed, which reduces the leakage current by 37 % compared to previous works, thereby reducing the circuit's power consumption to 18.5nW at typical conditions. The design works from a supply voltage of 0.5V and has a TC of 74. Sppm/ ${}^{\circ} \mathrm{C}$ over a temperature range of $0-80^{\circ} \mathrm{C}$. The PSRR of the circuit is -62.9dB at 100Hz. Based on the Monte Carlo simulations of 500 samples, we obtain an untrimmed $3\sigma/\mu$ of 2.6%. The design occupies an active area of 0.027mm2.
本文提出了一种基于开关电容网络(SCN)的分数阶带隙基准电压(BGR)电路,该电路采用180nm CMOS工艺设计,可实现高精度、低功耗的植入式生物医学应用。该设计提出了一种$V_{EB}$发生器,该发生器采用2倍电荷泵和改进的SCN来产生与温度无关的参考电压$(V_{REF})$ '。提出了一种小功率时钟产生电路,使漏电流减小37% % compared to previous works, thereby reducing the circuit's power consumption to 18.5nW at typical conditions. The design works from a supply voltage of 0.5V and has a TC of 74. Sppm/ ${}^{\circ} \mathrm{C}$ over a temperature range of $0-80^{\circ} \mathrm{C}$. The PSRR of the circuit is -62.9dB at 100Hz. Based on the Monte Carlo simulations of 500 samples, we obtain an untrimmed $3\sigma/\mu$ of 2.6%. The design occupies an active area of 0.027mm2.