HW/SW Co-Design Framework for Mixed-Criticality Embedded Systems Considering Xtratum-Based SW Partitions

V. Muttillo, L. Pomante, Patricia Balbastre Betoret, José-Enrique Simó-Ten, A. Crespo
{"title":"HW/SW Co-Design Framework for Mixed-Criticality Embedded Systems Considering Xtratum-Based SW Partitions","authors":"V. Muttillo, L. Pomante, Patricia Balbastre Betoret, José-Enrique Simó-Ten, A. Crespo","doi":"10.1109/DSD.2019.00085","DOIUrl":null,"url":null,"abstract":"Heterogeneous parallel devices are becoming widely diffused in the embedded systems application field since they allow to improve time performances and other orthogonal metrics (e.g., cost, power, size, etc.) at the same time. In such a context, the introduction of safety requirements, as dictated by the relevant standards (i.e., DO-178 B/C and RTCA/DO-254 in airborne systems, ARINC 653 for avionics software, ISO-26262 in automotive domain, etc.) while considering shared resources on a heterogeneous parallel HW platform, adds further challenges to industrial and academic research. This kind of platforms that execute tasks with different levels of criticality are commonly called mixed-criticality embedded systems. So, the main problem in their management is to ensure that low criticality tasks do not interfere with high criticality ones. The final goal is to allow several applications to interact and coexist on the same platform. For this, the exploitation of virtualization technologies (i.e., hypervisors) allows to guarantee isolation and to satisfy certification requirements but introduces scheduling overhead and new HW/SW partitioning challenges. In such a scenario, this work focuses on a framework for modeling, analysis, and validation of mixed-criticality and real-time systems based on an existing \"Model-Based Electronic System Level HW/SW Co-Design\" methodology. The main contribution of this work is the integration of the considered framework with Xamber tool in order to provide systems implementations by exploiting a design space exploration able to consider Xtratum-based SW partitions.","PeriodicalId":217233,"journal":{"name":"2019 22nd Euromicro Conference on Digital System Design (DSD)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 22nd Euromicro Conference on Digital System Design (DSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSD.2019.00085","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

Heterogeneous parallel devices are becoming widely diffused in the embedded systems application field since they allow to improve time performances and other orthogonal metrics (e.g., cost, power, size, etc.) at the same time. In such a context, the introduction of safety requirements, as dictated by the relevant standards (i.e., DO-178 B/C and RTCA/DO-254 in airborne systems, ARINC 653 for avionics software, ISO-26262 in automotive domain, etc.) while considering shared resources on a heterogeneous parallel HW platform, adds further challenges to industrial and academic research. This kind of platforms that execute tasks with different levels of criticality are commonly called mixed-criticality embedded systems. So, the main problem in their management is to ensure that low criticality tasks do not interfere with high criticality ones. The final goal is to allow several applications to interact and coexist on the same platform. For this, the exploitation of virtualization technologies (i.e., hypervisors) allows to guarantee isolation and to satisfy certification requirements but introduces scheduling overhead and new HW/SW partitioning challenges. In such a scenario, this work focuses on a framework for modeling, analysis, and validation of mixed-criticality and real-time systems based on an existing "Model-Based Electronic System Level HW/SW Co-Design" methodology. The main contribution of this work is the integration of the considered framework with Xamber tool in order to provide systems implementations by exploiting a design space exploration able to consider Xtratum-based SW partitions.
考虑基于xtratum的软件分区的混合临界嵌入式系统软硬件协同设计框架
异构并行器件在嵌入式系统应用领域正变得越来越广泛,因为它们可以同时提高时间性能和其他正交指标(例如,成本,功耗,尺寸等)。在这样的背景下,在考虑异构并行硬件平台上共享资源的同时,根据相关标准(即航空系统中的DO-178 B/C和RTCA/DO-254,航空电子软件的ARINC 653,汽车领域的ISO-26262等)规定的安全要求的引入,给工业和学术研究增加了进一步的挑战。这种执行不同临界级别任务的平台通常被称为混合临界嵌入式系统。因此,其管理的主要问题是如何保证低临界任务不干扰高临界任务。最终目标是允许多个应用程序在同一平台上交互和共存。为此,利用虚拟化技术(即管理程序)可以保证隔离并满足认证要求,但会引入调度开销和新的硬件/软件分区挑战。在这种情况下,这项工作的重点是基于现有的“基于模型的电子系统级硬件/软件协同设计”方法的混合临界和实时系统的建模、分析和验证框架。这项工作的主要贡献是将所考虑的框架与Xamber工具集成在一起,以便通过利用能够考虑基于xtratum的软件分区的设计空间探索来提供系统实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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