{"title":"A 2.4 GHz SiGe bipolar power amplifier with integrated diode linearizer for WLAN IEEE 802.11b/g applications","authors":"J.H. Kim, K.Y. Kim, Y.H. Park, Y. Chung, C. Park","doi":"10.1109/RWS.2006.1615146","DOIUrl":null,"url":null,"abstract":"A linear RF power amplifier with integrated reverse biased diode linearizer for IEEE 802.11b/g WLAN terminals is implemented with a 33 GHz-fT, 0.5-mum-SiGe bipolar technology. The proposed linearizer maintains the fixed base voltage of power stage HBTs. The power amplifier exhibits 24.5 dBm of 1-dB compression point (P1dB), with 36% of the power-added efficiency (PAE), and 17 dB of the power gain under 3.3 V power supply. The third-order IMD value is less than - 32.5 dBc at 3 dB back-off from P1dB for the frequency of 2.45 GHz. The fabricated chip size is as small as 1times0.7 mm2, including input/inter-stage matching network and all active bias circuits","PeriodicalId":244560,"journal":{"name":"2006 IEEE Radio and Wireless Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Radio and Wireless Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RWS.2006.1615146","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15
Abstract
A linear RF power amplifier with integrated reverse biased diode linearizer for IEEE 802.11b/g WLAN terminals is implemented with a 33 GHz-fT, 0.5-mum-SiGe bipolar technology. The proposed linearizer maintains the fixed base voltage of power stage HBTs. The power amplifier exhibits 24.5 dBm of 1-dB compression point (P1dB), with 36% of the power-added efficiency (PAE), and 17 dB of the power gain under 3.3 V power supply. The third-order IMD value is less than - 32.5 dBc at 3 dB back-off from P1dB for the frequency of 2.45 GHz. The fabricated chip size is as small as 1times0.7 mm2, including input/inter-stage matching network and all active bias circuits