Improved short-channel n-FET performance with virtual extensions

Abstract

A method is presented to use electrostatic coupling from a metal of appropriate effective workfunction, separated from the extension region by a thin insulator, to create a "virtual extension" in doped source/drain (S/D) MOSFETs. This electrostatically induced charge layer allows for lower extension doping and increased underlap between the doped extension and the gate, "sharpening" the carrier profile and improving short-channel device performance. In a typical n-channel MOSFET, switching currents in clock-limiting circuit paths are predicted to be 24% higher.