F. Ohtake, Y. Akasaka, A. Murakoshi, K. Suguro, T. Nakanishi
{"title":"A thin amorphous silicon buffer process for suppression of W polymetal gate depletion in PMOS","authors":"F. Ohtake, Y. Akasaka, A. Murakoshi, K. Suguro, T. Nakanishi","doi":"10.1109/VLSIT.2000.852775","DOIUrl":null,"url":null,"abstract":"The mechanism of gate depletion in PMOS W polymetal (W/WN/sub x//poly-Si) gate was investigated. It was found for the first time that the pile-up of boron (B) occurred at the WN/sub x//poly-Si interface due to B-N formation and the B concentration in poly-Si decreased resulting in gate depletion. In order to prevent the B pile-up, we developed a new process module and succeeded in suppressing the gate depletion without B penetration into Si substrate by using a thin amorphous Si buffer (ASB) layer combined with miniaturization of poly-Si grain-size.","PeriodicalId":268624,"journal":{"name":"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2000.852775","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The mechanism of gate depletion in PMOS W polymetal (W/WN/sub x//poly-Si) gate was investigated. It was found for the first time that the pile-up of boron (B) occurred at the WN/sub x//poly-Si interface due to B-N formation and the B concentration in poly-Si decreased resulting in gate depletion. In order to prevent the B pile-up, we developed a new process module and succeeded in suppressing the gate depletion without B penetration into Si substrate by using a thin amorphous Si buffer (ASB) layer combined with miniaturization of poly-Si grain-size.