High-Density 8Mb 1T-1C Ferroelectric Random Access Memory Embedded Within a Low-Power 130nm Logic Process

S. Summerfelt, T. Moise, K. Udayakumar, K. Boku, K. Remack, J. Rodriguez, J. Gertas, H. McAdams, S. Madan, J. Eliason, J. Groat, D. Kim, P. Staubs, M. Depner, R. Bailey
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引用次数: 14

Abstract

Ferroelectric memories are the most promising alternative to traditional embedded nonvolatile memories, such as flash and EEPROMs, because of their fast read/write cycle time, non-volatile data retention, low voltage/low power operation and low number of additional masks for fabrication (+2). An embedded ferroelectric memory (FRAM) has been developed using a 1.5 V, 130 nm 5 metal layer Cu/FSG logic process. The only modification to the logic process was the addition of a ferroelectric process module consisting of two additional masks (FECAP, VIAO) immediately before MET1. The ferroelectric was 70 nm Pb(Zr,Ti)O3 (PZT) deposited by metalorganic chemical vapor deposition (MOCVD). The electrical properties of a 8 Mb 1T-1C embedded FRAM were characterized. This eFRAM process has been used to simultaneously fabricate a digital signal processor (DSP) using the eFRAM process flow and the operating frequency is nearly the same relative to the CMOS baseline. This eFRAM process flow creates a technology platform that enables ultra-low-power devices.
低功耗130nm逻辑制程内的高密度8Mb 1T-1C铁电随机存取存储器
铁电存储器是传统嵌入式非易失性存储器(如闪存和eeprom)最有前途的替代品,因为它们具有快速的读/写周期时间,非易失性数据保留,低电压/低功耗操作和低数量的额外掩模制造(+2)。采用1.5 V, 130 nm 5金属层Cu/FSG逻辑工艺开发了嵌入式铁电存储器(FRAM)。对逻辑过程的唯一修改是在MET1之前立即添加由两个附加掩模(FECAP, VIAO)组成的铁电过程模块。铁电体为70 nm Pb(Zr,Ti)O3 (PZT),采用金属有机化学气相沉积(MOCVD)法制备。表征了8mb 1T-1C嵌入式FRAM的电学性能。该eFRAM工艺已被用于使用eFRAM工艺流程同时制造数字信号处理器(DSP),其工作频率与CMOS基线几乎相同。eFRAM工艺流程创建了一个技术平台,使超低功耗设备成为可能。
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