A motion estimation chip for block based MPEG-4 video applications

Abstract

The work presents an efficient VLSI architecture for the MPEG-4 video-coding standard. While its predecessors focused on the storage and transmission of audiovisual sequences, MPEG-4, being the first object-based coding standard, has much more to offer. Motion estimation (ME), the most computationally intensive part of MPEG, requires very high power throughput on account of its high memory utilization. To cope with the bandwidth and processing power requirements, the best approach entails a dedicated implementation for such a demanding algorithm. The first step of the design involves hardware/software partitioning to map most of the motion estimation functions in hardware. In order for the system to meet area and power dissipation constraints, fewer time critical functions, like intra-frame coding, discrete cosine transform, quantization, variable length coding and zigzag scanning, are handled as part of the software portion of the program. We have increased the precision significantly by doubling the accuracy of motion compensation from integer-pel to half-pel. Sum of absolute differences (SAD) is chosen as the criterion for evaluating the best match of motion vectors. The block matching is achieved with the novel robust search algorithm called predictive diamond search (PDS).