Performance of alternately iterative digital self-interference canceler for OFDM using full duplex

Takahiro Ohtomo, H. Yamada, M. Sawahashi, Keisuke Saito
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引用次数: 2

Abstract

In full duplex (FD), which improves frequency efficiency and achieves flexible resource assignment between the uplink and downlink, self-interference (SI) from a transmitter should be suppressed by using antenna isolation, an analog SI canceler, and digital SI canceler (DSIC) to a level such that the data or control channel satisfies the required block error rate (BLER). This paper proposes an alternately iterative DSIC (AI-DSIC) structure for orthogonal frequency division multiplexing (OFDM) using FD. We first present the required SI suppression level considering SI, quantization noise of an analog-to-digital converter, and nonlinear distortions of a power amplifier and RF receiver circuitries for a direct conversion transceiver using FD. Then, we propose an AI-DSIC structure that iterates alternately the generation of the SI estimate, the downlink symbol estimate, and removal of each from the received signal in the downlink including SI. We investigate the average BLER performance of the AI-DSIC for OFDM using FD based on link-level simulations under the condition that the derived required signal-to-SI ratio is satisfied.
全双工OFDM交替迭代数字自干扰消除器的性能
在全双工(FD)中,为了提高频率效率并在上行链路和下行链路之间实现灵活的资源分配,应该通过使用天线隔离、模拟SI消除器和数字SI消除器(DSIC)来抑制发射机的自干扰(SI),使数据或控制通道满足所需的块错误率(BLER)。提出了一种基于FD的正交频分复用(OFDM)交替迭代DSIC (AI-DSIC)结构。我们首先提出了所需的SI抑制水平,考虑了SI,模数转换器的量化噪声,以及使用FD的直接转换收发器的功率放大器和RF接收电路的非线性失真。然后,我们提出了一种AI-DSIC结构,该结构交替迭代生成SI估计、下行链路符号估计以及从包含SI的下行链路接收信号中去除每个符号。我们利用基于链路级仿真的FD研究了AI-DSIC用于OFDM的平均BLER性能,该性能满足推导出的所需信硅比。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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