{"title":"The effect of channel hot carrier stressing on gate oxide integrity in MOSFET","authors":"I. Chen, J. Choi, T. Chan, T. Ong, C. Hu","doi":"10.1109/RELPHY.1988.23416","DOIUrl":null,"url":null,"abstract":"The correlation between channel hot carrier stressing and gate oxide integrity is studied. It is found that channel hot carriers have no detectable effect on gate oxide integrity even when other parameters (e.g., Delta V/sub T/ and Delta VI/sub D/) have become intolerably degraded. In the extreme cases of stressing at V/sub G/ approximately=V/sub T/ with measurable hole injection current, however, the oxide charge-to-breakdown decreases linearly with the amount of hole fluence injected during the channel hot hole stressing. This may limit the endurance of a nonvolatile memory using hot holes for erasing. This can also explain the gate-to-drain breakdown of a device biased in the snap-back region, since snap-back at low gate voltage is favorable for hole injection. Snap-back-induced oxide breakdown could be an electrostatic-discharge failure mechanism.<<ETX>>","PeriodicalId":102187,"journal":{"name":"26th Annual Proceedings Reliability Physics Symposium 1988","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"25","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"26th Annual Proceedings Reliability Physics Symposium 1988","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RELPHY.1988.23416","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 25
Abstract
The correlation between channel hot carrier stressing and gate oxide integrity is studied. It is found that channel hot carriers have no detectable effect on gate oxide integrity even when other parameters (e.g., Delta V/sub T/ and Delta VI/sub D/) have become intolerably degraded. In the extreme cases of stressing at V/sub G/ approximately=V/sub T/ with measurable hole injection current, however, the oxide charge-to-breakdown decreases linearly with the amount of hole fluence injected during the channel hot hole stressing. This may limit the endurance of a nonvolatile memory using hot holes for erasing. This can also explain the gate-to-drain breakdown of a device biased in the snap-back region, since snap-back at low gate voltage is favorable for hole injection. Snap-back-induced oxide breakdown could be an electrostatic-discharge failure mechanism.<>