Performance analysis of banyan shift ATM switch

Abstract

The authors introduce a new ATM switch architecture based on banyan interconnection networks. Its hardware is less complex than that of an output queueing switch. The reduction in the hardware complexity can be obtained without either losing the self-routing property or suffering from performance degradation under uniform and nonuniform traffic. The switch is constructed with shift network. It has an internal buffer that is interconnected in the banyan networks. The shift networks allow a cell to be sent to the correct output port. It needs only the destination address to route a cell regardless of the state of the switch. Although the switch becomes blocking, it retains the self-routing property and achieves the maximum throughput of 100% with only small additional delay.<>