{"title":"Transistor-only low-voltage RF quadrature oscillator and frequency divider","authors":"U. Yodprasit, C. Enz","doi":"10.1109/RFIT.2005.1598876","DOIUrl":null,"url":null,"abstract":"An inductorless oscillator operating in the current domain for generating radio-frequency quadrature signals is presented. The quadrature phase and gain requirements can be achieved by cascading four low-voltage regulated cascode cells in a ring fashion. To demonstrate the proposed topology, a 0.9-V oscillator working from 0.44 GHz to 3.4 GHz and having a phase noise variation ranging between -92 dBc/Hz to -84.6 dBc/Hz at 3-MHz offset was simulated for a 0.18-/spl mu/m standard digital CMOS technology. In addition to working as a quadrature oscillator, the proposed circuit can be utilized as a frequency divider without modifying the topology.","PeriodicalId":337918,"journal":{"name":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIT.2005.1598876","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
An inductorless oscillator operating in the current domain for generating radio-frequency quadrature signals is presented. The quadrature phase and gain requirements can be achieved by cascading four low-voltage regulated cascode cells in a ring fashion. To demonstrate the proposed topology, a 0.9-V oscillator working from 0.44 GHz to 3.4 GHz and having a phase noise variation ranging between -92 dBc/Hz to -84.6 dBc/Hz at 3-MHz offset was simulated for a 0.18-/spl mu/m standard digital CMOS technology. In addition to working as a quadrature oscillator, the proposed circuit can be utilized as a frequency divider without modifying the topology.