Digital Hardware Spiking Neuronal Network with STDP for Real-time Pattern Recognition

Yang Xia, T. Levi, T. Kohno
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引用次数: 2

Abstract

By mimicking or being inspired by the nervous system, neuromorphic systems are designed to realize robust and power-efficient information processing by highly parallel architecture. Spike Timing Dependent Plasticity (STDP) is a common method for Spiking Neural Networks (SNNs). Here, we present a real-time SNN with STDP implementation on Field Programmable Gate Array (FPGA) using digital spiking silicon neuron model. Equipped with Ethernet Interface, FPGA allows online configuration as well as real-time processing data input and output. We show that this hardware implementation can achieve real-time pattern recognition tasks and allows the connection between multi-SNNs to extend the scale of networks.
用于实时模式识别的STDP数字硬件峰值神经网络
神经形态系统通过模仿或受到神经系统的启发,通过高度并行的架构实现鲁棒性和高能效的信息处理。Spike Timing Dependent Plasticity (STDP)是Spike Neural Networks (SNNs)的常用方法。在这里,我们提出了一个实时SNN与STDP在现场可编程门阵列(FPGA)上实现,使用数字尖峰硅神经元模型。FPGA配有以太网接口,可以在线配置,也可以实时处理数据的输入和输出。我们证明了这种硬件实现可以实现实时模式识别任务,并允许多个snn之间的连接来扩展网络的规模。
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