{"title":"Programmable voltage mode multifunctional filter using modified CMOS current controlled current conveyor transconductance amplifier","authors":"N. Gupta, P. Bansod","doi":"10.1109/CCINTELS.2016.7878227","DOIUrl":null,"url":null,"abstract":"The SISO voltage mode multifunctional filter topology is realized in this paper using a modified CCCCTA which realizes low-pass, high-pass, band-pass and band reject filter responses. The proposed topology consists of a CCCCTA, two 8-bit capacitor banks and a programmable input circuit using switches and VDTA. This circuit reduces the requirement of large amount of biasing current, given wider voltage transfer range and lesser power dissipation. The proposed filter gives a control over filter parameters such as Q-factor and cut off frequency by digitally controlling the capacitor bank. Required filter response is selected by programmable input circuit using same circuit topology. The circuit is simulated using Cadence Virtuoso UMC 180nm CMOS technology at ±1.5V power supply voltage.","PeriodicalId":158982,"journal":{"name":"2016 2nd International Conference on Communication Control and Intelligent Systems (CCIS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 2nd International Conference on Communication Control and Intelligent Systems (CCIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CCINTELS.2016.7878227","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The SISO voltage mode multifunctional filter topology is realized in this paper using a modified CCCCTA which realizes low-pass, high-pass, band-pass and band reject filter responses. The proposed topology consists of a CCCCTA, two 8-bit capacitor banks and a programmable input circuit using switches and VDTA. This circuit reduces the requirement of large amount of biasing current, given wider voltage transfer range and lesser power dissipation. The proposed filter gives a control over filter parameters such as Q-factor and cut off frequency by digitally controlling the capacitor bank. Required filter response is selected by programmable input circuit using same circuit topology. The circuit is simulated using Cadence Virtuoso UMC 180nm CMOS technology at ±1.5V power supply voltage.