Exploiting Emerging Reconfigurable Technologies for Secure Devices

Ansh Rupani, Shubham Rai, Akash Kumar
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引用次数: 6

Abstract

In the present work, we show how new and emerging reconfigurable technologies provide promising improvement over CMOS in the field of hardware security and encryption. We demonstrate how security features are a natural outcome of the circuits based on Silicon Nanowire reconfigurable transistors. This forms the basis of authentication key based security technique. Using the authentication key based system, we obtained the maximum possible key-length for MCNC benchmark circuits. Further, we formulated security as a tunable aspect for a circuit, by introducing don't care adjustment. A combination of the above two is used to establish security in terms of Shannon's entropy. We show that using the above concepts, Shannon's entropy increases for 99.1% benchmarks out of which maximum entropy is reached for 38.5% of all the benchmarks. We demonstrate these concepts using a case study for a 2-bit Ripple Carry Adder (RCA) based on SiNW RFETs and compare the design with its CMOS counterpart.
为安全设备开发新兴的可重构技术
在目前的工作中,我们展示了新兴的可重构技术如何在硬件安全和加密领域提供比CMOS有希望的改进。我们展示了安全特性是基于硅纳米线可重构晶体管的电路的自然结果。这构成了基于身份验证密钥的安全技术的基础。利用基于认证密钥的系统,我们得到了MCNC基准电路的最大可能密钥长度。此外,我们通过引入不在意调节,将安全性表述为电路的可调方面。以上两者的组合用于根据香农熵建立安全性。我们表明,使用上述概念,99.1%的基准测试香农熵增加,其中38.5%的基准测试达到最大熵。我们使用基于SiNW rfet的2位纹波进位加法器(RCA)的案例研究来演示这些概念,并将其设计与CMOS对应设计进行比较。
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