An Analog Architecture for the Radix-4 DHT

Abstract

Radix-4 decimation-in-time (DIT) fast Hartley transform algorithm for computing the Discrete Hartley Transform (DHT) was introduced by Brace well. DIT and decimation-in-frequency (DIF) algorithms were further developed by Sorenson et al. In these algorithms, the stage structures perform all the additions and multiplications and utilize stage dependent sine and cosine coefficients. A new radix-4 DIT algorithm for computing the DHT is proposed, which introduces multiplying structures in addition to the stage structures in the signal flow diagram that perform the multiplications with the stage independent cosine coefficients and their related additions leading to simplification of the stage structures. This leads to a reduction in the number of multiplications and additions. An analog architecture utilizing current feedback operational amplifiers which implements the algorithm in hardware has been proposed. It has been tested by simulating it with the help of Orcad PSpice.