At-speed testing of ASICs

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI:10.1109/VTEST.1991.208166

C. Gauthron

引用次数: 3

Abstract

Testing ASICs 'at-speed' attempts to improve the test quality by detecting delay-faults. In this paper a methodology to generate at-speed test vectors is described. It is based on the comparison of simulation traces obtained within different timing conditions. The methodology has been automated and successfully used.<>

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asic的高速测试

“高速”测试asic试图通过检测延迟故障来提高测试质量。本文描述了一种生成高速测试向量的方法。它是基于在不同时序条件下得到的仿真轨迹的比较。该方法已自动化并成功使用。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's

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