RISP: A Reconfigurable In-Storage Processing Framework with Energy-Awareness

2018 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID) Pub Date : 2018-05-01 DOI:10.1109/CCGRID.2018.00034

Xiaojia Song, T. Xie, Wen Pan

{"title":"RISP: A Reconfigurable In-Storage Processing Framework with Energy-Awareness","authors":"Xiaojia Song, T. Xie, Wen Pan","doi":"10.1109/CCGRID.2018.00034","DOIUrl":null,"url":null,"abstract":"Existing in-storage processing (ISP) techniques mainly focus on maximizing data processing rate by always utilizing total storage data processing resources for all applications. We find that this \"always running in full gear\" strategy wastes energy for some applications with a low data processing complexity. In this paper we propose RISP (Reconfigurable ISP), an energy-aware reconfigurable ISP framework that employs FPGA as data processing cells and NVM controllers. It can reconfigure storage data processing resources to achieve a high energy-efficiency without any performance degradation for big data analysis applications. RISP is modeled and then validated on an FPGA board. Experimental results show that compared with traditional host-CPU based computing RISP (with 16 channels or more) improves performance by 1.6-25.4× while saving energy by a factor of 2.2-161. Further, its reconfigurability can provide up to 77.2% additional energy saving by judiciously enabling data processing resources that are sufficient for an application.","PeriodicalId":321027,"journal":{"name":"2018 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CCGRID.2018.00034","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

Abstract

Existing in-storage processing (ISP) techniques mainly focus on maximizing data processing rate by always utilizing total storage data processing resources for all applications. We find that this "always running in full gear" strategy wastes energy for some applications with a low data processing complexity. In this paper we propose RISP (Reconfigurable ISP), an energy-aware reconfigurable ISP framework that employs FPGA as data processing cells and NVM controllers. It can reconfigure storage data processing resources to achieve a high energy-efficiency without any performance degradation for big data analysis applications. RISP is modeled and then validated on an FPGA board. Experimental results show that compared with traditional host-CPU based computing RISP (with 16 channels or more) improves performance by 1.6-25.4× while saving energy by a factor of 2.2-161. Further, its reconfigurability can provide up to 77.2% additional energy saving by judiciously enabling data processing resources that are sufficient for an application.

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RISP:具有能量感知的可重构存储处理框架

现有的存储内处理(ISP)技术主要是通过对所有应用程序始终使用全部存储数据处理资源来实现数据处理速率的最大化。我们发现这种“总是全速运行”的策略对于一些数据处理复杂性较低的应用程序来说浪费了能源。在本文中，我们提出了一种能量感知的可重构ISP框架RISP(可重构ISP)，它采用FPGA作为数据处理单元和NVM控制器。它可以重新配置存储数据处理资源，在不降低大数据分析应用性能的情况下实现高能效。建立了RISP模型，并在FPGA板上进行了验证。实验结果表明，与传统的基于主机- cpu的计算相比，RISP(16通道及以上)性能提高1.6-25.4倍，节能2.2-161倍。此外，通过明智地启用对应用程序足够的数据处理资源，其可重构性可以提供高达77.2%的额外节能。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2018 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID)

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