I. Kulikov, I. Chernykh, D. Karavaev, A. Sapetina, S. Lomakin
{"title":"The Efficiency of Hydrodynamic Code on Intel Xeon Scalable Architecture*","authors":"I. Kulikov, I. Chernykh, D. Karavaev, A. Sapetina, S. Lomakin","doi":"10.1109/ivmem53963.2021.00013","DOIUrl":null,"url":null,"abstract":"The results of the study of the hydrodynamics computing node equipped with Intel Cascade Lake processors, which is part of the NKS-1P Siberian Supercomputer Center, are presented in the article. In this work, we also propose a first modification of the numerical technique, which makes it possible to obtain a reproduction of an invariant numerical solution. In this work, we investigated not only weak and strong scalability but also investigated the energy efficiency of using various configurations of cores using the Intel RAPL interface. In this work, we try to offer some variants of weak and strong energy efficiency, which should be considered on an equal footing with the code efficiency in terms of time costs.","PeriodicalId":360766,"journal":{"name":"2021 Ivannikov Memorial Workshop (IVMEM)","volume":"77 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Ivannikov Memorial Workshop (IVMEM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ivmem53963.2021.00013","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The results of the study of the hydrodynamics computing node equipped with Intel Cascade Lake processors, which is part of the NKS-1P Siberian Supercomputer Center, are presented in the article. In this work, we also propose a first modification of the numerical technique, which makes it possible to obtain a reproduction of an invariant numerical solution. In this work, we investigated not only weak and strong scalability but also investigated the energy efficiency of using various configurations of cores using the Intel RAPL interface. In this work, we try to offer some variants of weak and strong energy efficiency, which should be considered on an equal footing with the code efficiency in terms of time costs.