R. Krishnan, V. Borghate, Rajat T. Shahane, S. Maddugari, S. Sabyasachi
{"title":"A three phase cascaded multilevel inverter operated with switching frequency optimal technique","authors":"R. Krishnan, V. Borghate, Rajat T. Shahane, S. Maddugari, S. Sabyasachi","doi":"10.1109/PICC.2018.8384772","DOIUrl":null,"url":null,"abstract":"Inverters have a wide range of applications in industries. Reduced switch topologies are current trend in multilevel inverters with reduced switching losses and improved total harmonic distortions. In this paper a new three phase multilevel inverter topology is proposed. The basic unit of proposed inverter in each phase generates a five level output under symmetric configuration and seven level output under asymmetrical configuration with 1:2 source ratio. The proposed inverter is modular in structure and a generalized circuit for n-levels is presented in this paper. The simulation of the proposed inverter is performed in MAT LAB/SI MULINK. The simulation results with symmetrical and asymmetrical configurations using single module and two modules is presented to validate the operation and modularity of the circuit.","PeriodicalId":103331,"journal":{"name":"2018 International Conference on Power, Instrumentation, Control and Computing (PICC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Conference on Power, Instrumentation, Control and Computing (PICC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PICC.2018.8384772","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Inverters have a wide range of applications in industries. Reduced switch topologies are current trend in multilevel inverters with reduced switching losses and improved total harmonic distortions. In this paper a new three phase multilevel inverter topology is proposed. The basic unit of proposed inverter in each phase generates a five level output under symmetric configuration and seven level output under asymmetrical configuration with 1:2 source ratio. The proposed inverter is modular in structure and a generalized circuit for n-levels is presented in this paper. The simulation of the proposed inverter is performed in MAT LAB/SI MULINK. The simulation results with symmetrical and asymmetrical configurations using single module and two modules is presented to validate the operation and modularity of the circuit.