Strong correlation between dielectric reliability and charge trapping in SiO/sub 2//Al/sub 2/O/sub 3/ gate stacks with TiN electrodes

Abstract

Polarity-dependent charge trapping and defect generation have been observed in SiO/sub 2//Al/sub 2/O/sub 3/ gate stacks with TiN electrodes. For the substrate injection case, electron trapping in the bulk of the Al/sub 2/O/sub 3/ films dominates, whereas hole trap near the Si substrate is observed for gate injection. This asymmetry in defect creation causes an asymmetry in oxide reliability. For gate injection, reliability is limited by the thin SiO/sub 2/ interfacial layer, yielding low beta values, independent of the Al/sub 2/O/sub 3/ thickness. For substrate injection, reliability is limited by electron trap generation in the bulk of the Al/sub 2/O/sub 3/ film, yielding a strong thickness dependence of the beta values, as expected from the percolation model and as observed in SiO/sub 2/ layers of similar thickness.