D. Ganta, Vignesh Vivekraja, K. Priya, L. Nazhandali
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引用次数: 13
Abstract
In this paper, we propose a new silicon PUF using efficient analog components that can be fabricated on a standard CMOS process. Our proposed design is built using leakage sensors with each measuring the leakage current of a transistor. Multiple identical leakage sensors are fabricated on the same chip. Due to manufacturing process variations, each sensor produces slightly different leakage values that can be compared in order to create a digital identification (ID) for the chip. Our results show that the proposed PUF is able to effectively identify a population of ICs. We also study the stability of our design with respect to temporary environmental variations like temperature and supply voltage. Our results show that nearly ideal stability can be achieved with minimal area overhead in our design. Comparing with a popular ring oscillator PUF architecture of the same entropy, our proposed PUF consumes about 80% less power, occupies about 85% less area, and has a high level of stability across a wide range of temperatures.