Benchmarking of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) Based Logic Circuits and 6T SRAM Cells

Chang-Hung Yu, P. Su, C. Chuang
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Abstract

We evaluate and benchmark the performance of logic circuits and stability/performance of 6T SRAM cells using monolayer and bilayer TMD devices based on ITRS 2028 (5.9nm) technology node. For the performance benchmarking of logic circuits, the tradeoff between electrostatic integrity (monolayer favored) and carrier mobility (bilayer favored), and the issues regarding the uncertainties in the mobility ratio and source/drain series resistance, the underlap device design, and the off-current spec., etc. are comprehensively addressed. In the evaluation of SRAM cells, the cell immunity to random variations is focused. Besides, the impact of high RSD of TMD materials on RSNM variability is also investigated. The source/drain underlap design is shown to alleviate the larger variability of bilayer SRAM cells. Finally, with superior electrostatics and immunity to random variations, the monolayer TMD devices are favored for low-power logic and SRAM applications; while the bilayer devices, with higher carrier mobility, are more suitable for high-performance logic and SRAM applications.
基于单层和双层二维过渡金属二硫化物(TMD)的逻辑电路和6T SRAM电池的基准测试
我们使用基于ITRS 2028 (5.9nm)技术节点的单层和双层TMD器件对6T SRAM单元的逻辑电路性能和稳定性/性能进行了评估和基准测试。对于逻辑电路的性能基准测试,全面解决了静电完整性(单层)和载流子迁移率(双层)之间的权衡,以及迁移率比和源/漏串联电阻的不确定性,underlap器件设计和断流规格等问题。在对SRAM细胞的评价中,重点关注细胞对随机变异的免疫。此外,还研究了TMD材料的高RSD对RSNM变异性的影响。源/漏衬垫设计被证明可以减轻双层SRAM细胞的较大变异性。最后,由于具有优异的静电性能和抗随机变化能力,单层TMD器件非常适合低功耗逻辑和SRAM应用;而双层器件具有更高的载流子迁移率,更适合高性能逻辑和SRAM应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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