High frequency Chirp signal generator using multi DDS approach on FPGA

Abstract

The range resolution and target detection capability in Radar Pulse compression techniques can be improved efficiently by a Linear frequency modulated (LFM) waveform or a chirp signal. As the conventional method of generating Linear frequency modulated waveform causes several limitations like instability and nonlinearity, this paper has proposed a digital technique to generate LFM signal by using a multi-DDS approach. For hardware implementations of any digitally designed module, the Joint Test Action Group (JTAG) plays a vital role in real-time processing. The JTAG standards in Field Programmable gate arrays (FPGA) are allowed to debug any design with the help of Hardware Co-Simulation JTAG block. In this paper, a linear frequency modulated waveform is generated using a Direct Digital Synthesizer (DDS) and System generator Xilinx block set. The Generated chirp signal is further implemented on FPGA-ZYNQ board (ZC7045-2ffg900), by generating a Hardware Co-simulation JTAG block, essentially required for radar signal processing.