{"title":"Demonstration of the benefits of SOI for high temperature operation","authors":"W. Krull, J.C. Lee","doi":"10.1109/SOI.1988.95439","DOIUrl":null,"url":null,"abstract":"Summary form only given. To evaluate the performance of SOI circuits at high temperatures, CMOS 4K SRAMs were fabricated on SIMOX (separation by implantation of oxygen) and bulk starting material. Four varieties were included in this study: bulk (5 mu m epi on n/sup +/), and SIMOX/SOI with three silicon-layer thicknesses (0.5 mu m, 0.75 mu m, and 1.0 mu m). This combination allows the assessment of three device structures: standard bulk devices, standard SOI devices (S/D contacting the buried oxide), and semi-bulk SOI devices which operate like bulk devices but are dielectrically isolated. All the SOI SRAMs were functional to the maximum temperature available, 300 degrees C. The bulk circuits also functioned at elevated temperatures, but lost functionality between 250 degrees C and 275 degrees C due to the rapidly increasing leakage current associated with the well junction. The synchronous access time increased approximately linearly with temperature for all devices, and was nearly twice the measured room-temperature value at 300 degrees C. Leakage current increased strongly with temperature for all devices, with the thin SOI devices having the least static current at the highest temperatures.<<ETX>>","PeriodicalId":391934,"journal":{"name":"Proceedings. SOS/SOI Technology Workshop","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. SOS/SOI Technology Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.1988.95439","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 24
Abstract
Summary form only given. To evaluate the performance of SOI circuits at high temperatures, CMOS 4K SRAMs were fabricated on SIMOX (separation by implantation of oxygen) and bulk starting material. Four varieties were included in this study: bulk (5 mu m epi on n/sup +/), and SIMOX/SOI with three silicon-layer thicknesses (0.5 mu m, 0.75 mu m, and 1.0 mu m). This combination allows the assessment of three device structures: standard bulk devices, standard SOI devices (S/D contacting the buried oxide), and semi-bulk SOI devices which operate like bulk devices but are dielectrically isolated. All the SOI SRAMs were functional to the maximum temperature available, 300 degrees C. The bulk circuits also functioned at elevated temperatures, but lost functionality between 250 degrees C and 275 degrees C due to the rapidly increasing leakage current associated with the well junction. The synchronous access time increased approximately linearly with temperature for all devices, and was nearly twice the measured room-temperature value at 300 degrees C. Leakage current increased strongly with temperature for all devices, with the thin SOI devices having the least static current at the highest temperatures.<>