Design of a Cesium Atomic Clock 1PPS Signal Generation and Synchronization Module Based on FPGA

Abstract

This paper introduces a design method of 1PPS signal generation and synchronization module which can be realized on FPGA, and uses the high stability 10MHz of cesium atomic clock as the global clock to generate 1PPS signal. When the external reference 1PPS signal is input, the internal 1PPS phase can be synchronized with the reference signal to realize the phase adjustment. The method is verified on spartan6 xcslx9 FPGA, which can generate 1PPS signal meeting the accuracy requirements and synchronize with external reference. This module was integrated into LIP Cs-3000 cesium atomic clock and verified.