A dynamically clustered chip multiprocessor

Abstract

Chip multiprocessors (CMPs) can outperform superscalar processors only for the application programs with full of thread-level parallelism. In this paper, we investigate how to combine both the advantages of a CMP and of a superscalar to execute an application. We aggregate multiple processing elements (PEs) in the CMP into a wide superscalar processor. The number of aggregated PEs is dynamically determined by the dependence distance of subsequent thread at the run time. According to different aggregation methods, the new CMP is capable of supporting three execution modes. To obtain the best performance, the processor keeps switching between different execution modes when executing an application, according to the characteristics of subsequent instructions.