Linjun He, Chenchang Zhan, Yang Nan, Ning Zhang, Lidan Wang, Guofeng Li
{"title":"A 0.5V 46.2ppm°C CMOS Voltage Reference Based on Compensated ΔVTH with Wide Temperature Range and High PSRR","authors":"Linjun He, Chenchang Zhan, Yang Nan, Ning Zhang, Lidan Wang, Guofeng Li","doi":"10.1109/NEWCAS.2018.8585544","DOIUrl":null,"url":null,"abstract":"This paper presents a CMOS voltage reference (CVR) with low power, high power supply ripple rejection (PSRR), and small area operating in a wide temperature range. The proposed circuit contains only MOSFETs biased in subthreshold region and operates based on compensated Δ ${\\mathbf{V}}_{\\mathbf{TH}}$ of two different-type transistors. Implemented in a standard 0.18$\\mu \\mathbf{m}$ CMOS process, the measured reference voltage of the proposed CVR is 344 mV with standard deviation of only 2.89 mV and achieves an average TC of 46.2ppm°C over a wide temperature range from - 40 °C to 125°C without individual chip-by-chip trimming. The measured PSRR is -70 dB, -51 dB and -52 dB at 10 Hz, 100 kHz and 10 MHz, respectively. The measured line sensitivity (LS) is 0.25%/V while consuming 15.65nW at 0.5V supply. The active area is 0.019$mm^{\\mathbf{2}}$.","PeriodicalId":112526,"journal":{"name":"2018 16th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 16th IEEE International New Circuits and Systems Conference (NEWCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEWCAS.2018.8585544","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper presents a CMOS voltage reference (CVR) with low power, high power supply ripple rejection (PSRR), and small area operating in a wide temperature range. The proposed circuit contains only MOSFETs biased in subthreshold region and operates based on compensated Δ ${\mathbf{V}}_{\mathbf{TH}}$ of two different-type transistors. Implemented in a standard 0.18$\mu \mathbf{m}$ CMOS process, the measured reference voltage of the proposed CVR is 344 mV with standard deviation of only 2.89 mV and achieves an average TC of 46.2ppm°C over a wide temperature range from - 40 °C to 125°C without individual chip-by-chip trimming. The measured PSRR is -70 dB, -51 dB and -52 dB at 10 Hz, 100 kHz and 10 MHz, respectively. The measured line sensitivity (LS) is 0.25%/V while consuming 15.65nW at 0.5V supply. The active area is 0.019$mm^{\mathbf{2}}$.