3DMemory — Memory usage analysis tool

Abstract

Die-stacking technology is opening up new options for memory system design. Through silicon vias (TSV) provide a configurable interface between memory and processing unit and allow a high bandwidth. System performance can be increased significantly by a sophisticated DRAM architecture design. This paper presents a framework providing a design recommendation for memory based on application execution data. The analysis approach can be adapted for different system configurations and applications. In this work a single-core execution of JPEG2000 algorithm for different picture sizes is analyzed with the tool.