Underfill encapsulant technology for flip chip assembly

K. Gilleo, G. Nicholls, P. Ongley
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引用次数: 3

Abstract

Direct chip attach (DCA) flip chip assembly offers many advantages in terms of signal speed and performance, compactness, weight and long term cost savings. The growth of portable electronics has focused attention on the use of flip chip attach, where all of these virtues are attractive. Selection of uniquely compatible materials for advanced assembly and packaging is rarely possible and a compromise is nearly always needed. This is particularly the case with DCA of complex Si devices using bumped technology for interconnection and mechanical attachment to the substrate. While there is considerable interest in the use of specialised conductive polymer adhesives, the implementation of DCA mainly relies on metallurgical connection between chip and substrate pad, whether it be the C4 solder bump process or the recent Au stud technique. The inevitable CTE mismatch between chip and composite substrate must be managed for long term joint reliability. Early work in DCA/flip chip development has shown clearly the possibility of joint dislocation and failure when the device is thermally stressed, particularly under extended rapid temperature cycling. Polymer-based underfill encapsulant materials have been developed and formulated to minimise the effect of /spl Delta/CTE induced stresses which manage the problem effectively by acting as a mechanical compensator layer between chip and substrate. This paper outlines the basic requirements of the underfill material, the effects of CTE mismatch and methods of application. An overview of typical problems with flip chip/underfill encapsulants is also presented.
倒装芯片组装的下填充封装技术
直接芯片连接(DCA)倒装芯片组装在信号速度和性能、紧凑性、重量和长期成本节约方面具有许多优势。便携式电子产品的发展将注意力集中在倒装芯片的使用上,所有这些优点都很有吸引力。为先进的组装和包装选择独特兼容的材料很少是可能的,妥协几乎总是需要的。对于使用碰撞技术进行互连和与衬底机械连接的复杂Si器件的DCA,情况尤其如此。虽然对专用导电聚合物粘合剂的使用有相当大的兴趣,但DCA的实现主要依赖于芯片和衬底垫之间的冶金连接,无论是C4焊料凸点工艺还是最近的Au螺柱技术。芯片和复合基板之间不可避免的CTE不匹配必须管理,以实现长期的连接可靠性。DCA/倒装芯片开发的早期工作已经清楚地表明,当器件受到热应力时,特别是在长时间快速温度循环下,关节错位和失效的可能性。聚合物基下填充材料的开发和配方可以最大限度地减少/spl Delta/CTE引起的应力的影响,通过充当芯片和衬底之间的机械补偿层,有效地解决了这个问题。本文概述了下填材料的基本要求、CTE错配的影响及应用方法。还概述了倒装/下填充封装材料的典型问题。
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