Quantitative studies of processing element granularity

[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation Pub Date : 1992-10-19 DOI:10.1109/FMPC.1992.234925

T. C. Marek, E. Davis

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引用次数: 3

Abstract

Quantitative results of experiments on PE (processing element) granularities are presented. An architecture simulation workbench has been developed for experiments on PE granularities of 1, 4, 8, and 16-b. An analysis of the impact of various I/O (input/output) and communication path widths is also possible. Overall performance, communication balance, PE utilization, and operand lengths can be monitored to evaluate the merits of various granularities and feature sets. This workbench has been used to run a set of benchmark algorithms that cover a range of computation and communication requirements, a range of data sizes, and a range of problem array sizes. The authors report results for two of the algorithms studied by T.C. Marek (1992): image rotation and image resampling. The results obtained are counterintuitive. They indicate that bit-serial machines have performance advantages due to inherent bit-oriented activity, even when using multiple bit operands, and to inter-PE communication when paths are narrower than the processor granularity.<>

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加工元素粒度的定量研究

给出了PE(加工元件)粒度的定量实验结果。针对PE粒度为1、4、8和16-b的实验，开发了体系结构仿真工作台。还可以分析各种I/O(输入/输出)和通信路径宽度的影响。可以监控总体性能、通信平衡、PE利用率和操作数长度，以评估各种粒度和特性集的优点。这个工作台用于运行一组基准测试算法，这些算法涵盖了一系列的计算和通信需求、一系列的数据大小和一系列的问题数组大小。作者报告了T.C. Marek(1992)研究的两种算法的结果:图像旋转和图像重采样。得到的结果是违反直觉的。他们指出，位串行机由于固有的面向位的活动而具有性能优势，即使在使用多个位操作数时也是如此，并且当路径比处理器粒度更窄时，pe间通信也具有性能优势

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation

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