A novel fabrication and wafer level hermetic sealing method for SOI-MEMS devices using SOI cap wafers

M. M. Torunbalci, S. E. Alper, T. Akin
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引用次数: 5

Abstract

This paper presents a novel and inherently simple all-silicon fabrication and hermetic packaging method developed for SOI-MEMS devices, enabling lead transfer using vertical feedthroughs formed on an SOI cap wafer. The processes of the SOI cap wafer and the SOI-MEMS wafer require a total of five inherently-simple mask steps, providing a combined process and packaging yield as high as 95%. The hermetic encapsulation is achieved by Au-Si eutectic bonding at 400°C. The package pressure is measured as 1 Torr without any getter activation, and the package is proved to remain hermetic even after various temperature cycling tests. The shear strength of the fabricated chips is measured to be above 15 MPa, indicating a mechanically strong bonding.
一种利用SOI帽晶圆制造SOI- mems器件的新型晶圆级密封方法
本文提出了一种新颖且固有简单的全硅制造和密封封装方法,用于SOI- mems器件,通过在SOI帽晶圆上形成的垂直馈线实现引线转移。SOI盖晶圆和SOI- mems晶圆的工艺总共需要五个本质上简单的掩模步骤,提供了一个组合的工艺和封装良率高达95%。密封封装是通过在400℃下的Au-Si共晶键合实现的。在没有任何吸气器激活的情况下,包的压力测量为1托,并且包被证明即使在各种温度循环测试后仍保持密封。所制薄片的抗剪强度在15 MPa以上,表明粘接具有较强的机械强度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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