An FPGA-based accelerator platform implements for convolutional neural network

Abstract

In recent years, convolutional neural network (CNN) has become widely universal in large number of applications including computer vision, natural language processing and automatic driving. However, the CNN-based methods are computational-intensive and resource-intensive, and thus are hard to integrate the neural network into embedded systems such as smart phones, automatic driving and robots. To address the limitation, various deep learning accelerators have been proposed to implement on the field programmable gate array (FPGA) platform, because of its flexibility and reconfigurability. In this paper, we design and implement an FPGA-based accelerator platform which integrated the NVIDIA deep learning accelerator (NVDLA). We illustrate the detail architecture of the accelerator, and give the software and hardware co-design approaches which can instruct the system designs of FPGA-based accelerator platform. As a case study, we implement the CNN accelerator on an XCZU9EG FPGA platform and our implement achieves a peak performance of 25.6 GOPS when computing the valid output of convolutional layers under 100 MHz working frequency.