{"title":"A 60-GHz on-chip monopole antenna using silicon technology","authors":"S. Upadhyay, S. Srivastava","doi":"10.1109/AEMC.2013.7045122","DOIUrl":null,"url":null,"abstract":"Necessity of decreasing the size and circuit integration of microwave and millimeter wave components has increased the demand of silicon based technology. This paper presents the design of a 60GHz on-chip antenna based on silicon CMOS technology. A monopole antenna is selected for design because of its wideband characteristics. It exhibits an impedance bandwidth from 45GHz to 70GHz. The size of the proposed antenna structure is 1.953mm × 1.93mm × 0.25mm. A minimum |S11| of -31.56dB is obtained at 58.5GHz and |S11| of -27.77dB obtained at desired 60GHz frequency. A top metal layer M6 of antenna as radiating element and bottom layer M1 to work as ground plane for antenna is grown on silicon substrate and inside SiO2 layer. A 15 μm thin layer of SiO2 is used for isolation. Gain of -4.96dB is achieved at 60GHz and gain of -4.81dB is achieved at 58.5GHz. The simulation of design was done in finite element method (FEM) based electromagnetic solver HFSS v 15.0 software package.","PeriodicalId":169237,"journal":{"name":"2013 IEEE Applied Electromagnetics Conference (AEMC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Applied Electromagnetics Conference (AEMC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AEMC.2013.7045122","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
Necessity of decreasing the size and circuit integration of microwave and millimeter wave components has increased the demand of silicon based technology. This paper presents the design of a 60GHz on-chip antenna based on silicon CMOS technology. A monopole antenna is selected for design because of its wideband characteristics. It exhibits an impedance bandwidth from 45GHz to 70GHz. The size of the proposed antenna structure is 1.953mm × 1.93mm × 0.25mm. A minimum |S11| of -31.56dB is obtained at 58.5GHz and |S11| of -27.77dB obtained at desired 60GHz frequency. A top metal layer M6 of antenna as radiating element and bottom layer M1 to work as ground plane for antenna is grown on silicon substrate and inside SiO2 layer. A 15 μm thin layer of SiO2 is used for isolation. Gain of -4.96dB is achieved at 60GHz and gain of -4.81dB is achieved at 58.5GHz. The simulation of design was done in finite element method (FEM) based electromagnetic solver HFSS v 15.0 software package.