Design of a low output voltage DC/DC converter for telecom application with a new scheme for self-driven synchronous rectification

Abstract

In this paper, the design and experimental results of a very low output voltage DC/DC converter for a specific telecom application (1.5 V, 10 A) is presented and analyzed. Several topologies have been compared and analyzed, not only from the point of view of size (15 W/inch/sup 3/, 10 mm of height) and efficiency (>85%), but also regarding the dynamic response of the converter to supply pulsating loads (80 A//spl mu/s). A new driving scheme for self-driven synchronous rectification (SDSR) is used. It allows use of the standard half bridge topology, which is very suitable for such a wide input voltage range (36 V-72 V).