An Area-Efficient SPHINCS+ Post-Quantum Signature Coprocessor

Abstract

The significant advances in the area of quantum computing of the past decade leave no doubt about the fact that quantum computers are an actual threat to cryptography. For this reason, a lot of efforts have been made lately in designing so-called post-quantum cryptographic primitives. The adoption of these schemes depends on the future capability of post-quantum cryptographic schemes to offer performances and functionalities similar to their classical counterparts. In particular, a milestone towards standardization is the implementation on FPGA of cryptographic primitives which leads to an efficient execution. We contribute in this respect by providing an area-efficient FPGA implementation of SPHINCS+, a post-quantum signature scheme which guarantees very high security, allowing its deployment into embedded systems such as hardware security modules, IoT devices or nanosatellites.