A Novel Hardware Architecture to Accelerate Burrows-Wheeler Transform

Abstract

Burrows-Wheeler Transform (BWT) is an important algorithm in many fields including string matching for genome sequences. However, the implementations of BWT-based algorithms are limited due to the complexity of its sorting process. This paper presents a novel hardware architecture which can significantly reduce the number of sorting iterations. Experimental results show a significant reduction in both cycles and time to compute the BWT. Moreover, with the increase of Longest Common Prefix (LCP), our proposed architecture outperforms the traditional implementations further. In the worst case, it achieves 75.1× and 33.2× speedup compared with the Wavesorter architecture and the traditional parallel sorting network architecture respectively.