A 10ns Bipolar Memory, Working with 18 I/O Bus

Abstract

A double 576 bits random access memory organized as 2×32 words by 18 bits has been designed, completely tested, and qualified from a functionality and reliability point of view. The two major advantages of this memory are a good speedpower trade off for this particular type of organization and its ability to work with two independant 18 bits I/O busses.