Bruno Vilić Belina, Renato Babojelic, Š. Ileš, J. Matuško
{"title":"Analysis of FPGA Implementation of Set-based Predictive Control for Grid-tied Inverters","authors":"Bruno Vilić Belina, Renato Babojelic, Š. Ileš, J. Matuško","doi":"10.1109/EDPE53134.2021.9604107","DOIUrl":null,"url":null,"abstract":"This paper analyses an field-programmable gate array (FPGA) implementation of a set-based model predictive control algorithm for controlling a grid-tied inverter with an LCL filter. Parallelizing the MPC algorithm in FPGA hardware led to substantial decrease in computation time. The implementation is show to be synthesizeable on a commercial mid-range FPGA device.","PeriodicalId":117091,"journal":{"name":"2021 International Conference on Electrical Drives & Power Electronics (EDPE)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 International Conference on Electrical Drives & Power Electronics (EDPE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDPE53134.2021.9604107","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper analyses an field-programmable gate array (FPGA) implementation of a set-based model predictive control algorithm for controlling a grid-tied inverter with an LCL filter. Parallelizing the MPC algorithm in FPGA hardware led to substantial decrease in computation time. The implementation is show to be synthesizeable on a commercial mid-range FPGA device.