{"title":"Performace Improvement of TFET using Gate drain overlap structure with hetrojunction","authors":"K. Kavi, Abhishek Devedi, R. Mishra","doi":"10.1109/UPCON56432.2022.9986389","DOIUrl":null,"url":null,"abstract":"This paper compares and analyzes the performance of DMDG-TFET and DMDG-GDOV TFET with Si source and with heterojunction formed by Ge Source. It reports the influence of using gate drain overlap with heterojunction formed by Ge source on the performance parameters such as drain current(ID), subthreshold swing(SS), current switching ratio(ION/IOFF), am- bipolar current, capacitance, transconductance and intrinsic delay of the TFET device. The gate-drain overlap helps in improving the ambipolar behavior of the device as the electric field in the ambipolar region is reduced. Further the influence of Silicon-Germanium heterojunction reduces the tunneling barrier width which results in the improved-ON current of the proposed device. This also improves the transconductance and switching speed of the TFET device.","PeriodicalId":185782,"journal":{"name":"2022 IEEE 9th Uttar Pradesh Section International Conference on Electrical, Electronics and Computer Engineering (UPCON)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 9th Uttar Pradesh Section International Conference on Electrical, Electronics and Computer Engineering (UPCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/UPCON56432.2022.9986389","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper compares and analyzes the performance of DMDG-TFET and DMDG-GDOV TFET with Si source and with heterojunction formed by Ge Source. It reports the influence of using gate drain overlap with heterojunction formed by Ge source on the performance parameters such as drain current(ID), subthreshold swing(SS), current switching ratio(ION/IOFF), am- bipolar current, capacitance, transconductance and intrinsic delay of the TFET device. The gate-drain overlap helps in improving the ambipolar behavior of the device as the electric field in the ambipolar region is reduced. Further the influence of Silicon-Germanium heterojunction reduces the tunneling barrier width which results in the improved-ON current of the proposed device. This also improves the transconductance and switching speed of the TFET device.