An Efficient, Current-Mode Full-Adder Based on Majority Logic in CNFET Technology

Abstract

In this study, a new high-speed low-power current-mode full-adder (CMFA) based on majority logic is presented. The proposed CMFA consists of only 14 transistors. Simulations are performed by HSPICE using the 32 nm carbon nanotube field-effect transistor (CNTFET) Stanford model at a supply voltage of 0.5 V, operating frequency of 1 GHz, a load capacitance of 2 fF and a current of 10 μA for any reference current value suitable for low-voltage high-speed applications. The simulation results show that, in the worst case, the delay of the proposed circuit for sum and carry outputs is equal to 42 ps, and the power-delay product (PDP) is 98.7 E−17 J.